1. Field of the Invention
This invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and in particular, to a semiconductor device comprising a trench capacitor, and source/drain diffusion layer electrically connected with the trench capacitor, and a method for manufacturing such a semiconductor device.
2. Description of the Related Art
FIG. 1 shows a cross-sectional view of a DRAM cell having a trench capacitor according to the prior art. Referring to FIG. 1, reference numeral 81 denotes a monocrystalline p-type silicon substrate, 82 a trench capacitor, 83 a buried n-type well, 84 a p-type well, 85 n-type source/drain diffusion layer, 86 a gate insulating film, 87 a gate electrode, 88 an element-isolating insulating film, and 89 an insulating film.
The trench capacitor 82 is constituted by an n-type diffusion layer 90 (plate electrode), a capacitor insulating film 91 and an n-type polycrystalline silicon film 92 (storage node electrode).
On the n-type polycrystalline silicon film 92, there is deposited an n-type polycrystalline silicon film 93 which is directly connected with the n-type source/drain diffusion layer 85. Namely, the trench capacitor 82 is electrically connected with the n-type source/drain diffusion layer 85 through the n-type polycrystalline silicon film 93 functioning as a connecting portion.
Since the n-type source/drain diffusion layer 85 is monocrystalline, there is a possibility that the n-type polycrystalline silicon film 93 epitaxially grows with the source/drain diffusion layer 85 being utilized as a seed crystal during a heating step in the DRAM process. This heating step is performed in a step of forming a passivation film subsequent to the steps of forming the trench capacitor 82 and an MOS transistor for instance.
If the n-type polycrystalline silicon film 93 epitaxially grows in this manner, stress is caused to generate inside the resultant semiconductor elements, thereby giving rise to the generation of crystal defects inside the substrate. The crystal defects of this kind may become a cause for the generation of a leak current. The quantity of electric charge stored in the capacitor generally decrease as the degree of integration of a DRAM increases. Therefore, the generation of the aforementioned leak current cannot be disregarded particularly in the case of a highly integrated DRAM which will be going to be developed from now on.
As one of the means for preventing the generation of the aforementioned leak current, it may be conceivable to employ a DRAM cell as shown in FIG. 2. The DRAM cell shown in FIG. 2 is featured in that the n-type polycrystalline silicon film 93 is indirectly connected via a silicon nitride film 94 with the source/drain diffusion layer 85. As a result, due to the presence of the silicon nitride film 94 functioning as a barrier, the source/drain diffusion layer 85 is no longer capable of functioning as a seed crystal, thus making it possible to prevent the n-type polycrystalline silicon film 93 from being epitaxially grown.
Since the silicon nitride film 94 is one kind of insulating film, this silicon nitride film 94 is required to be extremely thin in order to sufficiently secure an electric connection between the n-type polycrystalline silicon film 93 and the source/drain diffusion layer 85.
However, even if it is possible to make the silicon nitride film 94 extremely thin, the silicon nitride film 94 is still permitted to function as an insulating film, so that it is impossible to avoid an increase of contact resistance between the trench capacitor 82 and the source/drain diffusion layer 85.
As mentioned above, in the case of the conventional DRAM cell having a trench capacitor, the trench capacitor is electrically connected, via an n-type polycrystalline silicon film or an n-type polycrystalline silicon film/silicon nitride film, with source/drain diffusion layer.
In the case of the former, due to the epitaxial growth of the n-type polycrystalline silicon film (storage node electrode) constituting a trench capacitor, a stress, which is a cause of a leak current generates inside the resultant semiconductor elements, thus causing the generation of a leak current. On the other hand, in the case of the latter, it would be impossible to prevent an increase in contact resistance between the n-type polycrystalline silicon film and the source/drain diffusion layer.